CoDeveloper C-to-FPGA Tutorials

The following tutorials will help you start using CoDeveloper with a minimum of time and effort. You can benefit from reading these tutorials and examining the provided source code samples, or you can use these tutorials as a guide as you step through the CoDeveloper software yourself.

Creating VHDL and Verilog from C-Language - This tutorial explains the basics of C-to-HDL compilation by walking you through the compilation to hardware of a 16-bit wide, 12-tap streaming FIR filter.

Using C-Language for Functional Testing and Debugging - Using a multiple-process, pipelined image filter, this tutorial explains how standard C-language tools can be used to validate your code, before generating hardware.

Tutorials for Specific FPGA Platforms

The following tutorials and other resources are intended to help you get started more quickly with CoDeveloper for your selected target platform. Note that the specific steps described in these tutorials may differ from the steps required using currently-released software, due to version changes. Please also note that the platforms used here are only a representative selection; there are many other FPGA-based platforms that can be used with the CoDeveloper C-to-FPGA tools.

Tutorials for Altera FPGA Platforms

Tutorials for Xilinx FPGA Platforms

Video Tutorials

The following video tutorials and demonstrations are available on YouTube. For best results, choose the HQ (High Quality) viewing mode:

Finding Nemo using FPGA-Based Video Filtering - Demonstrates the use of the Xilinx Video Starter Kit in combination with Impulse C-to-FPGA tools, Xilinx System Generator and Xilinx Platform Studio.

Implementing Random Number Generation on a Pico Computing FPGA Cluster (Part 1) - Provides an introduction to Impulse C-to-FPGA tools and the Pico Computing FPGA hardware platforms.

Implementing Random Number Generation on a Pico Computing FPGA Cluster (Part 2) - Continuation, showing how to compile and optimize the C code to FPGA hardware for high performance.

Implementing Random Number Generation on a Pico Computing FPGA Cluster (Part 3) - Continuation, showing how how to generate VHDL and synthesize using the Xilinx tools.

Implementing Random Number Generation on a Pico Computing FPGA Cluster (Part 4) - Continuation, showing how to download to the Pico FPGA card and test the random number generator.